Pwm inverter control apparatus and control method

ABSTRACT

It is an object of the invention to provide a multilevel PWM inverter control apparatus capable of safely carrying out switching from a normal operation to a protecting operation and performing a reset from the protecting operation to the normal run safely and smoothly without requiring a complicated control algorithm.  
     In the invention, if a current value I which is measured is set to have a level which is equal to or higher than the level of a first reference value I 1  and is lower than the level of a second reference value I 2 , a zero vector to be started from an OOO state in which an intermediate potential is output for all of phases is output (Step  22 ). If the current value I is set to have a level which is equal to or higher than the level of the second reference value I 2  and is lower than the level of a third reference value I 3 , a base block operation for bringing all of switching units into an OFF state is carried out after outputting the zero vector (Step  28 ). If the current value I is equal to or greater than the third reference value I 3 , an emergency stop is carried out (Step  29 ). When a reset to a normal operation is carried out after the execution of the base block operation, the reset to the normal operation is performed after the execution of the operation for outputting the zero vector.

TECHNICAL FIELD

The present invention relates to a PWM inverter control apparatus andmore particularly to a multilevel PWM inverter control apparatus inwhich four switching units are connected in series for each layerbetween a DC bus voltage having a plus level and a DC bus voltage havinga minus level.

BACKGROUND ART

In order to control the rotating speed of an AC motor, a PWM invertercontrol apparatus has widely been used. In the case in which the outputcurrent of the PWM inverter control apparatus is increased for someabnormality, it is necessary to limit the output current or to carry outa protecting operation in order to obtain the safety of the PWM invertercontrol apparatus and the safety of equipment to be connected as a load.In order to implement such a protecting operation, conventionally, thesafety has been ensured by using a base block operation for cutting offa gate signal to control ON/OFF of a switching unit and bringing all ofthe switching units into an OFF state, thereby carrying out aprotection.

An operation for detecting the abnormality of an output current to carryout a protection in such a conventional PWM inverter control apparatusis shown in a flowchart of FIG. 4. First of all, the output current isdetected and a current value thereof is set to be I (Step 41), and thecurrent value I is compared with a preset reference value Ith (Step 42).At the Step 42, a normal run is carried out (Step 43) if the currentvalue I is smaller than the reference value Ith, and a base blockoperation is carried out (Step 44) if the current value I is equal to orgreater than the reference value I_(th). When a next control cyclecomes, the current value I is compared with the reference value I_(th)in the same manner and the base block operation is continuously carriedout until the current value I is smaller than the reference valueI_(th).

According to such a conventional PWM inverter control apparatus, in thecase in which some abnormality is generated so that an output current isincreased, the base block operation is carried out so that theprotecting operation is performed. However, there has been proposed amultilevel PWM inverter control apparatus for switching an outputvoltage among three levels having a positive, an intermediate potentialand a negative in order to reduce a harmonic component which isgenerated in addition to a PWM inverter control apparatus for switchingan output voltage between two levels having the positive and thenegative.

In the multilevel PWM inverter control apparatus, only a voltage whichis a half of the voltage of a DC power supply is applied to both ends ofeach switching unit. For this reason, the breakdown voltage of eachswitching unit is a half of the voltage of the DC power supply. When thevoltage of the DC power supply is exactly applied to both ends, anovervoltage breakdown is caused. In such a multilevel PWM invertercontrol apparatus, a large number of switching units are to be switchedso that a structure is complicated. Therefore, a problem arises in thecase in which the protecting operation is carried out through a baseblock. This problem is that the operation timing of each switching unitis shifted when the normal operation is changed to the base blockoperation and when the base block operation is changed to the normaloperation, and a voltage which is at least a double of a normal voltageis applied to one switching unit, resulting in the generation of theovervoltage breakdown.

For example, in the case in which three of the four switching unitsconnected in series are turned ON at the same time, the voltage of theDC power supply is exactly applied to the residual switching unit sothat a breakdown is caused.

In order to prevent such a bad influence, as described in JP-A-10-164854publication, there has been proposed a method of detecting an abnormalstate when a switching unit is broken down due to a power short circuitor an overcurrent and delaying a timing for cutting off a specificswitching unit in order to prevent the further breakdown of theswitching unit due to an overvoltage.

According to such a method of delaying a timing for cutting off aspecific switching unit, it is possible to prevent the breakdown of theswitching unit to protect an apparatus. In the case in which amultilevel PWM inverter control apparatus is to be protected safely anda smooth reset to a normal run is to be implemented, however, it isnecessary to carry out a control in a very complicated timing.

In the case in which an abnormality such as an overcurrent which isdetected is temporarily caused, moreover, a smooth reset from theprotecting operation to the normal operation is required. However, it ishard to smoothly carry out the reset to the normal operation in theprotecting method using a base block in which all of the switching unitsare turned OFF, and furthermore, a protecting method of delaying atiming for cutting off a specific switching unit.

The conventional multilevel PWM inverter control apparatus has thefollowing problems.

(1) In the case in which only the protecting operation using the baseblock is carried out, there is a possibility that an overvoltage mightbe applied to the switching unit, resulting in a breakdown.

(2) In the case in which the breakdown of the switching unit is to beprevented in order to delay a timing for cutting off a specificswitching unit, a control algorithm becomes complicated.

(3) In the case in which the protecting operation for bringing all ofthe switching units into an OFF state is carried out, it is hard tosmoothly perform the reset from the protecting operation to the normaloperation.

It is an object of the invention to provide a multilevel PWM invertercontrol apparatus which can implement, in a simple algorithm, aprotecting operation capable of safely carrying out switching from anormal operation to a protecting operation and ensuring the safety of aninverter body also when performing a reset from the protecting operationto the normal run, and furthermore, safely supplying a power toequipment to be connected as a load.

DISCLOSURE OF THE INVENTION

In order to attain the object, the invention provides a PWM invertercontrol apparatus in which four switching units are connected in seriesfor each phase between a DC bus voltage having a plus level and a DC busvoltage having a minus level, comprising:

-   -   a current detecting circuit for detecting a current value of an        output current; and    -   a controller for outputting a zero vector to be started from an        O state in which all phases are turned ON by second and third        switching units from the DC bus voltage side having the plus        level to output an intermediate potential to be a voltage        between the plus and minus levels of the DC bus voltage when the        current value measured by the current detecting circuit is equal        to or greater than a first reference value which is preset and        has a lower level than a level of a second reference value which        is higher than a level of the first reference value, carrying        out a base block operation for bringing all of the switching        units into an OFF state after outputting the zero vector when        the current value is equal to or greater than the second        reference value and has a lower level than a level of a third        reference value which is higher than the level of the second        reference value, and executing an emergency stop when the        current value is equal to or greater than the third reference        value.

According to the invention, when a current value I detected by thecurrent detecting circuit is equal to or greater than a first currentvalue, the base block operation or the emergency stop operation isalways carried out after the zero vector state to be started from an OOOstate is brought. If the state of the switching unit which is obtainedimmediately before the execution of a protecting operation is any of P,N and O, therefore, a change in a voltage is reduced to a half of thevoltage of a DC power supply so that the switching unit can be preventedfrom being broken down due to an overvoltage.

Moreover, the states of P, N and O are used also in a normal operation.Therefore, it is possible to smoothly carry out a reset from a zerovector state of PPP, OOO or NNN to a normal operation and to perform theprotecting operation without requiring a complicated algorithm.

Furthermore, the controller may carry out a reset to a normal operationafter performing a zero vector output operation when executing the resetto the normal operation after carrying out the base block operation.

According to the invention, when a reset from the protecting operationto the normal operation is to be carried out, a zero vector outputoperation is always performed. Therefore, it is possible to prevent theswitching unit from being broken down due to an overvoltage whencarrying out the reset from the protecting operation to the normaloperation.

Moreover, the invention provides a PWM inverter control apparatus inwhich four switching units are connected in series for each phasebetween a DC bus voltage having a plus level and a DC bus voltage havinga minus level, comprising:

-   -   a current detecting circuit for detecting a current value of an        output current; and    -   a controller for outputting such a zero vector as to bring an O        state in which all of phases are turned ON by second and third        switching units from the DC bus voltage side having the plus        level to output an intermediate potential to be a voltage        between the plus and minus levels of the DC bus voltage and then        carrying out a base block operation for bringing all of the        switching units into an OFF state when the current value        measured by the current detecting circuit is equal to or greater        than a preset reference value, and for outputting such a zero        vector as to bring all of the phases into the O state and then        performing a reset to a normal run when the current value is        smaller than the reference value.

According to the invention, when the normal operation is switched to theprotecting operation based on the base block operation, setting iscarried out to always bring a zero vector state started from an OOOstate when performing a reset from the protecting operation to thenormal operation. In the switching from the normal operation to theprotecting operation and the reset from the protecting operation to thenormal operation, therefore, it is possible to prevent the switchingunit from being broken down due to an overvoltage.

In addition, the zero vector may be started from an OOO state in whichall of the phases are turned ON by the second and third switching unitsfrom the DC bus voltage side having the plus level to output theintermediate potential to be the voltage between the plus and minuslevels of the DC bus voltage, and

-   -   may be always brought into the OOO state between a PPP state in        which all of the phases are turned ON by first and second        switching units from the DC bus voltage side having the plus        level to output the plus level of the DC bus voltage and an NNN        state in which all of the phases are turned ON by third and        fourth switching units from the DC bus voltage side having the        plus level to output the minus level of the DC bus voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing the structure of a PWM invertercontrol apparatus according to a first embodiment of the invention.

FIG. 2 is a flowchart showing a PWM inverter control method according tothe first embodiment of the invention.

FIG. 3 is a flowchart showing a PWM inverter control method according toa second embodiment of the invention.

FIG. 4 is a flowchart showing a conventional PWN inverter controlmethod.

In the drawings, 1 denotes a controller, 2 denotes a current detectingcircuit, 3 denotes a DC power supply, 41 to 44 denote a step, 11 and 12denote a voltage dividing capacitor, 101 to 112 denote a switching unit,201 to 212 denote a free wheel diode, and 301 to 306 denote a clampdiode.

BEST MODE FOR CARRYING OUT THE INVENTION

Next, embodiments of the invention will be described in detail withreference to the drawings.

First Embodiment

FIG. 1 is a block diagram showing the structure of a PWM invertercontrol apparatus according to a first embodiment of the invention.

The PWM inverter control apparatus according to the embodiment isconstituted by a controller 1, a current detecting circuit 2, a DC powersupply 3, smoothing capacitors 11 and 12, switching units 101 to 112,free wheel diodes 201 to 212, and intermediate level outputting clampdiodes 301 to 306.

The controller 1 controls a gate signal input to the gate of each of theswitching units 101 to 112, thereby controlling the timing of ON/OFF ofeach of the switching units 101 to 112. The current detecting circuit 2measures the current value of a current output from the PWM invertercontrol apparatus.

In the PWM inverter control apparatus, four switching units areconnected in series for each phase. In a circuit constituted by the fourswitching units 101 to 104, for example, a positive voltage is outputwhen the switching units 101 and 102 are turned ON, an intermediatepotential is output when the switching units 102 and 103 are turned ON,and a negative voltage is output when the switching units 103 and 104are turned ON.

In the following description, assuming that four of the switching units101 to 112 which are connected in series make a set to be a phase andare indicated as S1, S2, S3 and 54 from an upper side, a state in whichtwo upper switching units S1 and S2 are turned ON is represented as a Pstate in which the plus level of a DC bus voltage is output, a state inwhich two middle switching units S2 and 53 are turned ON is representedas an O state in which a neutral voltage subjected to capacitor dividingis output, and a state in which two lower switching units S3 and S4 areturned ON is represented as an N state in which the minus level of a DCbus is output.

The controller 1 according to the embodiment brings the state of eachphase into a state of P, N or O during A normal operation, therebycontrolling an output voltage to a motor. In the embodiment, whencarrying out a protecting operation, the controller 1 controls eachswitching unit to bring a zero vector state, thereby protecting eachswitching unit and equipment to be connected. The zero vector stateimplies a state in which the output voltage of each phase is set to havethe same level. In the case in which a three-phase multilevel PWMinverter control apparatus is taken as an example and each phase isdescribed in order, the zero vector state includes three types of statesof PPP, OOO and NNN.

Since the PWM inverter control apparatus according to the embodimentshown in FIG. 1 has features in only the control algorithm of thecontroller 1 and other circuit structures are the same as those in aconventional multilevel PWM inverter control apparatus, detaileddescription thereof will be omitted.

Next, the operation of the multilevel PWM inverter control apparatusaccording to the embodiment will be described in detail with referenceto a flowchart of FIG. 2.

First of all, an output current is detected by the current detectingcircuit 2 and a current value thereof is set to be I (Step 21), and thecontroller 1 compares the current value I with a first reference valueI₁ which is preset (Step 22). If the current value I is smaller than thefirst reference value I₁ at the Step 22, the controller 1 carries out anormal run (Step 23) If the current value I is equal to or greater thanthe first reference value I₁ at the Step 22, the controller 1 stops thenormal operation and switching to an operation for outputting a zerovector is carried out for a safety.

Description will be given to the operation for outputting a zero vector.The controller 1 switches the vectors of PPP, OOO and NNN in order andoutputs them, and sets to always output the zero vector from the OOOwhen carrying out the switching to the operation for outputting the zerovector. The reason is as follows. A pulse pattern obtained immediatelybefore outputting the zero vector cannot be predicted. In the case inwhich the PPP and the NNN are output at the beginning when the switchingto the operation for outputting the zero vector is carried out,therefore, a voltage to be applied to the switching unit is suddenlychanged and the ON/OFF timing of the switching unit is varied.Consequently, a full voltage is applied to one switching unit in theworst state, resulting in the breakdown of equipment.

For example, in the case in which four switching units for a certainphase are set to the P state, a voltage is changed from a plus level toa minus level so that a fluctuation in a voltage corresponding to thevoltage of the DC power supply 3 is generated when the state of theswitching units for the same phase is brought into the N state as aprotecting operation. To the contrary, in the case in which the statesof four switching units for a certain phase are set to the N state, avoltage is changed from the minus level to the plus level so that afluctuation in the voltage corresponding to the voltage of the DC powersupply 3 is generated when the states of the switching units for thesame phase are brought into the P state as a protecting operation. Onthe other hand, in the case in which the state of a switching unit for acertain phase is set to the O state, a change in a voltage is a half ofthe voltage of the DC power supply 3 at a maximum when a state obtainedimmediately therebefore is any of P, N and O. Even if the ON/OFF timingof the switching unit is varied, thus, only the half of the voltage ofthe DC power supply 3 is applied to one switching unit.

In the case in which the zero vector of the NNN is output immediatelyafter the output of the zero vector of the PPP and the reverse casethereto, moreover, there is a danger that a full voltage might beapplied to one switching unit due to the variation in the ON/OFF timingof the switching unit as described above. Therefore, the vector of theOOO is set to be output before or after the output of the zero vector ofthe PPP or NNN, which is safer.

Next, the controller 1 outputs the zero vector at Step 24 and thencompares the output current value I which is detected with a secondreference value I₂ (Step 25). If the current value I is smaller than thesecond reference value I₂ at the Step 25, an operation for outputtingthe zero vector is continuously carried out (Step 26) and a return tothe processing of carrying out a comparison with the first comparisonvalue I₁ is performed (Step 22). If the current value I is smaller thanthe first reference value I₁ at the Step 22, a reset to the normal runis carried out (Step 23). If the current value I is equal to or greaterthan the first reference value I₁, the operation for outputting the zerovector is continuously carried out. If the current value I is equal toor greater than the first reference value I₁ and is smaller than thesecond reference value I₂, accordingly, the zero vector is continuouslyoutput.

In the comparison between the current value I and the second referencevalue I₂ at the Step 25, if the output current value I which is detectedis equal to or greater than the second reference value I₂, thecontroller 1 compares the current value I with a third reference valueI₃ (Step 27). If the current value I is smaller than the third referencevalue I₃ at the Step 27, the controller 1 carries out a base blockoperation for stopping the operations of all of the switching units 101to 112 (Step 28). After the processing of the Step 28, then, a return tothe processing of comparing the current value I with the secondcomparison value I₂ is carried out (Step 25) and the same processing asthat described above is executed. If the current value I is equal to orgreater than the second reference value I₂, the base block operation iscontinuously carried out. If the current I is equal to or greater thanthe second reference value I₂ and is smaller than the third referencevalue I₃, accordingly, the controller 1 continuously carries out thebase block operation.

In the comparison of the current value I with the third reference valueI₃ at the Step 27, if the current value I which is detected is equal toor greater than the third reference value I₃, the controller 1 stops theoperation of the inverter as a final protection and gives an alarm toconfirm a whole safety and to carry out restarting (Step 29).

In the processing described above, in the case in which the protectingoperation using a base block is carried out and a return from the statein which all of the switching units 101 to 112 are turned OFF to thenormal operation is performed, there is a possibility that a shock mightbe generated depending on the situation of a motor to be connected toequipment if the reset to the normal operation is directly performed.For this reason, the controller 1 is set to carry out the base blockoperation at the Step 28, and thereafter, to always return the normaloperation through the operation for outputting the zero vector at theStep 26 without directly performing the reset to the normal operation.

The first reference value I₁ is set to have a slightly higher level thanthe level of a rated current value. In other words, while the firstreference value I₁ exceeds the rated current value due to a suddenacceleration/deceleration or a fluctuation in a load, it is permitted ina short time. Accordingly, the controller 1 waits for the current valueI to be decreased while outputting the zero vector, and returns to thenormal operation if the current value I is smaller than the firstreference value I₁. The vector itself in the P, N and O states is alsooutput during a normal run. Therefore, this operation can be grasped asa part of the normal run. Therefore, it is possible to smoothly carryout the reset from the protecting operation to the normal run.

While the second reference value I₂ has a higher level than the level ofthe first reference value I₁, moreover, it is permitted in a very shorttime. A state in which the current value I is equal to or greater thanthe second reference value I₂ is generated when an operation exceedingthe capability of equipment is to be carried out or due to a suddenchange in a load. However, it is necessary to instantly return to therated current value. For this reason, the controller 1 does not bringthe zero vector state in which the output current cannot be reducedrapidly but carries out the protecting operation using the base block.

Furthermore, the third reference value I₃ has a higher level than thelevel of the second reference value I₂. In a state in which the currentvalue I is equal to or greater than the third reference value I₃, someabnormality is generated and it is necessary to carry out a releaseafter confirming a safety. Therefore, the equipment itself is notautomatically reset. This state will be hereinafter referred to as anemergency stop.

Thus, the first to third reference values I₁ to I₃ are set and themethod of the protecting operation is switched depending on the measuredcurrent value I in such a manner that a reset to the normal run can becarried out immediately in case of a slight abnormality and theoperation can be stopped instantly to ensure the safety in case of aserious abnormality. More specifically, in the case in which a load tobe connected to the equipment is operated, it is necessary to meet ademand for safely carrying out a stop operation when some accident iscaused without interrupting the run as much as possible.

According to the multilevel PWM inverter control apparatus in accordancewith the embodiment, when the current value I detected by the currentdetecting circuit 2 is equal to or greater than the first current valueI₁, the base block operation or the emergency stop operation is alwaysexecuted after the zero vector state is brought. Setting is carried outto first bring the OOO state in the switching from the normal operationto the zero vector state. Even if the state of the switching unit whichis obtained immediately before the execution of the protecting operationis any of P, N and O, therefore, a change in a voltage is reduced to bea half of the voltage of the DC power supply 3 so that the switchingunit can be prevented from being broken down due to an overvoltage.

Moreover, the states of P, N and O are used also in the normaloperation. Consequently, it is possible to smoothly carry out the resetfrom the zero vector states of PPP, OOO and NNN to the normal operationand to execute the protecting operation without requiring a complicatedalgorithm.

Furthermore, the zero vector output operation is always carried out inthe execution of the reset from the protecting operation to the normaloperation. Therefore, it is possible to prevent the switching unit frombeing broken down due to an overvoltage in the execution of the resetfrom the protecting operation to the normal operation.

Second Embodiment

Next, description will be given to a PWM inverter control apparatusaccording to a second embodiment of the invention.

The PWM inverter control apparatus according to the embodiment isdifferent from the PWM inverter control apparatus according to the firstembodiment shown in FIG. 1 in respect of only the control algorithm of acontroller 1. In the following, therefore, the operation of the PWMinverter control apparatus according to the embodiment will be describedwith reference to a flowchart of FIG. 3.

First of all, an output current is detected by a current detectingcircuit 2 and a current value thereof is set to be I (Step 31), and thecontroller 1 compares the current value I with the second referencevalue I₂ (Step 32). If the current value I is smaller than the secondreference value I₂ at the Step 32, the controller 1 carries out a normalrun (Step 33). If the current value I is equal to or greater than thesecond reference value I₂ at the Step 32, the controller 1 stops thenormal operation and outputs a zero vector for a safety (Step 34).Herein, the controller 1 may output only an OOO vector in a zero vector.Next, the controller 1 carries out a protecting operation using a baseblock (Step 35). Then, the comparison of the current value X and thesecond reference value I₂ is carried out again (Step 36). If the currentvalue I is equal to or greater than the reference value I₂, the baseblock operation is continuously carried out. If the current value I issmaller than the second reference value I₂ at the Step 36, thecontroller 1 outputs the zero vector (Step 37) and is thereafterreturned to the normal run (the Step 33). In the same manner as in theStep 34, only the OOO vector in the zero vector may be output. By theexecution of such a processing, the controller 1 is set to always carryout the operation for outputting the zero vector before a reset from theprotecting operation to the normal operation.

The embodiment supposes an application to a multilevel PWM invertercontrol apparatus in the case in which a motor connected to equipmenthaving a small number of functions and a simple structure is to becontrolled. For this reason, the base block operation is carried outinstantly when an overcurrent is simply detected, and the zero vectorstarted from OOO immediately before and after the base block operationis output when a reset from the base block operation to the normal runis to be performed.

Also in the embodiment, in the same manner as in the first embodimentdescribed above, a third reference value I₃ may be provided as a finalprotection and the inverter may be operated to emergently stop as thefinal protection or a time required for operating the base block may beintegrated and an emergency stop may be carried out after the operationis continuously performed for a certain period or more.

While the invention has been described in detail with reference to thespecific embodiments, it is apparent to the skilled in the art thatvarious changes and modifications can be made without departing from thespirit and scope of the invention.

The application is based on Japanese Patent Application(JP-A-2002-171256) filed on Jun. 12, 2002 and contents thereof areincorporated by reference.

INDUSTRIAL APPLICABILITY

As described above, according to the invention, in the multilevel PWNinverter control apparatus, it is possible to produce an advantage thatswitching from a normal operation to a protecting operation can besafely carried out without requiring a complicated control algorithm,and furthermore, the safety of an inverter body can be ensured and asmooth reset from the protecting operation to the normal operation canbe performed when the reset is to be executed, and a power can also besupplied safely to equipment to be connected as a load.

1. A PWM inverter control apparatus in which four switching units areconnected in series for each phase between a DC bus voltage having aplus level and a DC bus voltage having a minus level, comprising: acurrent detecting circuit for detecting a current value of an outputcurrent; and a controller for outputting a zero vector to be startedfrom an O state in which all phases are turned ON by second and thirdswitching units from the DC bus voltage side having the plus level tooutput an intermediate potential to be a voltage between the plus andminus levels of the DC bus voltage when the current value measured bythe current detecting circuit is equal to or greater than a firstreference value which is preset and has a lower level than a level of asecond reference value which is higher than a level of the firstreference value, carrying out a base block operation for bringing all ofthe switching units into an OFF state after outputting the zero vectorwhen the current value is equal to or greater than the second referencevalue and has a lower level than a level of a third reference valuewhich is higher than the level of the second reference value, andexecuting an emergency stop when the current value is equal to orgreater than the third reference value.
 2. The PWM inverter controlapparatus according to claim 1, wherein the controller carries out areset to a normal operation after performing a zero vector outputoperation when executing the reset to the normal operation aftercarrying out the base block operation.
 3. A PWM inverter controlapparatus in which four switching units are connected in series for eachphase between a DC bus voltage having a plus level and a DC bus voltagehaving a minus level, comprising: a current detecting circuit fordetecting a current value of an output current; and a controller foroutputting such a zero vector as to bring an O state in which all ofphases are turned ON by second and third switching units from the DC busvoltage side having the plus level to output an intermediate potentialto be a voltage between the plus and minus levels of the DC bus voltageand then carrying out a base block operation for bringing all of theswitching units into an OFF state when the current value measured by thecurrent detecting circuit is equal to or greater than a preset referencevalue, and for outputting such a zero vector as to bring all of thephases into the O state and then performing a reset to a normal run whenthe current value is smaller than the reference value.
 4. The PWMinverter control apparatus according to any of claims 1 to 3, whereinthe zero vector is started from an OOO state in which all of the phasesare turned ON by the second and third switching units from the DC busvoltage side having the plus level to output the intermediate potentialto be the voltage between the plus and minus levels of the DC busvoltage, and the zero vector is always brought into the OOO statebetween a PPP state in which all of the phases are turned ON by firstand second switching units from the DC bus voltage side having the pluslevel to output the plus level of the DC bus voltage and an NNN state inwhich all of the phases are turned ON by third and fourth switchingunits from the DC bus voltage side having the plus level to output theminus level of the DC bus voltage.
 5. A PWM inverter control method forcontrolling a PWM inverter control apparatus in which four switchingunits are connected in series for each phase between a DC bus voltagehaving a plus level and a DC bus voltage having a minus level,comprising the steps of: detecting a current value of an output current;outputting a zero vector to be started from an O state in which allphases are turned ON by second and third switching units from the DC busvoltage side having the plus level to output an intermediate potentialto be a voltage between the plus and minus levels of the DC bus voltagewhen the current value is equal to or greater than a first referencevalue which is preset and has a lower level than a level of a secondreference value which is higher than a level of the first referencevalue; carrying out a base block operation for bringing all of theswitching units into an OFF state after outputting the zero vector whenthe current value is equal to or greater than the second reference valueand has a lower level than a level of a third reference value which ishigher than the level of the second reference value; and executing anemergency stop when the current value is equal to or greater than thethird reference value.
 6. The PWM inverter control method according toclaim 5, further comprising a step of carrying out a reset to a normaloperation after performing a zero vector output operation when executingthe reset to the normal operation after carrying out the base blockoperation.
 7. A PWM inverter control method for controlling a PWMinverter control apparatus in which four switching units are connectedin series for each phase between a DC bus voltage having a plus leveland a DC bus voltage having a minus level, comprising the steps of:detecting a current value of an output current; outputting such a zerovector as to bring an O state in which all of phases are turned ON bysecond and third switching units from the DC bus voltage side having theplus level to output an intermediate potential to be a voltage betweenthe plus and minus levels of the DC bus voltage when the current valueis equal to or greater than a preset reference value; carrying out abase block operation for bringing all of the switching units into an OFFstate after outputting the zero vector; and outputting such a zerovector as to bring all of the phases into the O state and thenperforming a reset to a normal run when the current value is smallerthan the reference value.
 8. The PWM inverter control method accordingto any of claims 5 to 7, wherein the zero vector is started from an OOOstate in which all of the phases are turned ON by the second and thirdswitching units from the DC bus voltage side having the plus level tooutput the intermediate potential to be the voltage between the plus andminus levels of the DC bus voltage, and the zero vector is alwaysbrought into the OOO state between a PPP state in which all of thephases are turned ON by first and second switching units from the DC busvoltage side having the plus level to output the plus level of the DCbus voltage and an NNN state in which all of the phases are turned ON bythird and fourth switching units from the DC bus voltage side having theplus level to output the minus level of the DC bus voltage.